Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier. - I-Scover metadata
ARTICLE

Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier.

Metadata details

now loading...

Related ARTICLE(s)

now loading...

Related metadata

now loading...

Search by external websites

now loading...

Login 日本語